spi.c
Go to the documentation of this file.
1 
23 #include <app.h>
24 
28 volatile bit gSpiTx=CLEAR;
29 volatile bit gSpiRx=CLEAR;
33 void SPI_Init(void)
34 {
35  SSPEN = DISABLE; // Reset
36 
37  TRISC4 = DIR_IN; // SPI Slave In
38  TRISC5 = DIR_OUT; // SPI Slave Out
39  TRISC3 = DIR_OUT; // SPI Slave CLK Out
40  // TRISA5 = DIR_IN; // SPI SS Enabled In, used for other purpose then SPI
41 
42  SMP = CLEAR; // Input data at middle (compat=0)
43 
44  SSPM0 = CLEAR; // Clock /4
45  SSPM1 = CLEAR;
46  SSPM2 = CLEAR;
47  SSPM3 = CLEAR;
48 
49  CKP = SET; // Clock idle is high
50  CKE = CLEAR; // Data on rising edge (compat=1)
51 
52  SSPEN = ENABLE; // SPI port pins enabled
53  SSPIE = ENABLE; // Enable interrupt on SPI receiving
54  PEIE = ENABLE; // Enable peripherial interrupt(For SPI)
55 }
63 {
64  BYTE rxdata;
65  rxdata = SSPBUF; // lose any data in buffer, clear BF
66  SSPBUF = data;
67  while (!BF) continue;
68  CLRWDT();
69  return SSPBUF;
70 }
75 void SPI_Write(BYTE data)
76 {
77  gSpiTx = 1;
78  SPI_Exchange(data);
79  while (gSpiTx);
80 }
86 BYTE SPI_Read(void)
87 {
88  BYTE in;
89  gSpiRx = 0;
90  in = SPI_Exchange(0x00);
91  while (!gSpiRx);
92  return in; // get received data, clear BF
93 }
94 
95 //*********************************************************[ENDL]***************
96 
97 
98 
99 
BYTE SPI_Exchange(BYTE data)
Definition: spi.c:62
void SPI_Init(void)
Definition: spi.c:33
#define SET
Definition: pgrl.h:104
#define CLEAR
Definition: pgrl.h:103
#define DISABLE
Definition: pgrl.h:86
volatile bit gSpiTx
Definition: spi.c:28
#define DIR_OUT
Definition: pgrl.h:105
#define ENABLE
Definition: pgrl.h:85
unsigned char BYTE
Definition: pgrl.h:38
#define DIR_IN
Definition: pgrl.h:106
JADEKU project defines and dependency headers.
volatile bit gSpiRx
Definition: spi.c:29
BYTE SPI_Read(void)
Definition: spi.c:86
void SPI_Write(BYTE data)
Definition: spi.c:75